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Logical design using integrated circuits / William D. Becher.

By: Publication details: Rochelle Park, N.J. : Hayden Book Co., c1977.Description: 305 p. : ill. ; 24 cmISBN:
  • 0810458594
Subject(s): DDC classification:
  • 621.3819582 22 BEC
LOC classification:
  • TK7868.L6 B4
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Holdings
Item type Current library Call number Copy number Status Date due Barcode
Book Open Access Book Open Access Engineering Library 621.3819582 BEC 1 (Browse shelf(Opens below)) 1 Available 0021695


CONTENTS

NUMBER SYSTEMS
Introduction
The decimal system
The octal system
E.tc

CODING SYSTEMS
Coded decimal systems
The hexadecimal code
Unit distance codes
E.tc

BOOLEAN ALGEBRA
Set theory
Boolean algebra
Algebraic examples
E.tc


RELAY LOGIC
Relay circuits
The AND circuit
The OR CIRCUIT
E.tc

INTEGRATED CIRCUIT LOGIC ELEMENTS
The diode
The positive-OR circuit
The positive AND circuit
E.tc

KARNAUGH MAP MINIMIZATION
Introduction
The 2-variable Karnaugh map
The 3-variable Karnaugh map
E.tc


QUINE-McCLUSKEY MINIMIZATION
Introduction
Quine's method
QUINE-mcCluskey procedure
A shorthand notation
E.tc

FUNCTIONAL DECOMPOSITION
Nand /nor decomposition
Sample disjoint decomposition
Complex disjoint decomposition
E.tc


COMBINATIONAL LOGIC DESIGN
Gray-to-binary converter
BCD-to-decimal converter
BCD-to 7 segment decoder/driver
E.tc

FLIP-FLOPS
Nor RS flip flop
Timing diagrams
NAND RS flip flop
E.tc

PULSED AND CLOCKED SEQUENTIAL LOGIC DESIGN
A sequential circuit
Mearl y- Moore models
The state diagram
E.tc

LEVEL-MODE SEQUENTIAL LOGIC DESIGN
Introduction
A problem
The flow table
E.tc

SEQUENTIAL CIRCUITS AND COUNTERS
D flip-flop design
JK flip flop design
Lathes
E.tc

DIGITAL SYSTEMS
Digital clock
Frequency meter
Interval timer
E.tc

Includes index.

Bibliography: p. 277-282.

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