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Computer system architecture / M. Morris Mano.

By: Publication details: Englewood Cliffs, N.J. : Prentice Hall, c1993.Edition: 3rd editionDescription: xviii, 525 p. : ill. ; 25 cmISBN:
  • 8120308557
Subject(s): DDC classification:
  • 004.22 20 MAN
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Chapter 1 Digital Logic Circuits
1.1 Digital Computers
1.2 Logic Gates
1.3 Boolean Algebra
Complement of a Function
1.4 Map Simplification
Product of -Sums Simplification
Don't-Care Condition, etc.

Chapter 2 Digital Components
2.1 Integrated Circuits
2.2 Decoders
NAND Gate Decoder
Decoder Expansion
Encoders
2.3 Multiplexers
2.4 Registers
2.5 Shift Registers, etc.

Chapter 3 Data Representation
3.1 Data Types
3.2 Complements
3.3 Fixed-point Representation
3.5 Floating -Point Representation, etc.

Chapter 4 Register Transfer and Micro operations
4.1 Register Transfer Language
4.2 Register Transfer
4.3 Bus and Memory Transfers
4.4 Arithmetic Micro operation
4.5 Logic Micro operation, etc.

Chapter 3 Basic Computer Organization and Design
5.1 Instruction Codes
5.2 Computer Registers
5.3 Computer Instruction
5.4 Timing and Control
5.5 Instruction Cycle, etc.

Chapter 6 Programming the Basic Computer
6.1 Introduction
6.2 Machine Language
6.3 Assembly Language
6.4 The Assembler
6.5 Program Loops

Chapter 7 Micro programmed Control
7.1 Control Memory
7.2 Address Sequencing
7.3 Microprgram Example
7.4 Design of Control Unit

Chapter 8 Central Processing Unit
8.1 Introduction
8.2 General Register Organization
8.3 Stack Organization
8.4 Instruction Formars
8.5 Addressing Modes

Chapter 9 Pipeline and Vector Processing
9.1 Parallel Processing
9.2 Pipelining
9.3 Arithmetic Pipeline
9.4 Instruction Pipeline
9.5 RISC Pipeline, etc.

Chapter 10 Computer Arithmetic
10.1 Introduction
10.2 Addition and Subtraction with Signed-Magnitude Data
10.3 Multiplication Algorithm
10.4 Division Algorithms
10.5 Floating-Print Arithmetic Operations, etc.

Chapter 11 Input-Output Organization
11.1 Peripheral Devices
11.2 Input-Output Interface
11.3 Asynchronous Data Transfer
11.4 Modes of Transfer
11.5 Priority Interrupt, etc.

Chapter 12 Memory Organization
12.1 Memory Hierarchy
12.2 Main Memory
12.3 Auxiliary Memory
12.4 Associative Memory
12.5 Cache Memory, etc.

Chapter 13 Multiprocessors

13.1 Characteristics of Multiprocessors
13.2 Interconnection Structures
13.3 Interprocessor Arbitration
13.4 Interprocessor Communication
13.5 Cache Coherence






Includes bibliographical References p486-487, Index: p515-525.

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