Computer system architecture / M. Morris Mano.
Publication details: New jersey : Prentice Hall, c1993?Edition: 3rd editionDescription: xviii, 525 p. : ill. ; 25 cmISBN:- 0131757385
- 978131757387
- 004.22 22 MAN
Item type | Current library | Call number | Copy number | Status | Date due | Barcode |
---|---|---|---|---|---|---|
Book Open Access | Engineering Library | 004.2 MAN 1 (Browse shelf(Opens below)) | 1 | Available | BUML23070555 | |
Book Open Access | Engineering Library | 004.2 MAN 2 (Browse shelf(Opens below)) | 2 | Available | BUML23070554 | |
Book Open Access | Engineering Library | 004.2 MAN 3 (Browse shelf(Opens below)) | 3 | Available | BUML23091651 |
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CONTENT
Chapter 1: Digital logic circuits
1-1 Digital computers
1-2 Logic gates
1-3 Boolean algebra
1-4 Map simplification
1-5 Combinational circuits.
etc.
Chapter 2: Digital components
2-1 Integrated circuits
2-2 Decoders
2-3 Multiplexers
2-4 Registers
2-5 Shift registers
etc.
Chapter 3: Data representation
3-1 Data types
3-2 Complements
3-3 Fixed-point representation
3-4 Floating- point representation
3-5 Other binary codes
etc..
Chapter 4: Register transfer and micro operations
4-1 Register transfer language
4-2 Register transfer
4-3 Bus and memory transfers
4-4 Arithmetic micro operations
4-5 Logic micro operations
etc.
Chapter 5: Basic computer organization and design
5-1 Instruction code
5-2 Computer registers
5-3 Computer instructions
5-4 Timing and control
5-5 Instruction cycle
etc.
Chapter 6: Programming the basic computer
6-1 Introduction
6-2 Machine language
6-3 Assembly language
6-4 The assembler
6-5 Program loops
etc.
Chapter 7: Micro programmed control
7-1 Control memory
7-2 Address sequencing
7-3 Micro program example
7-4 Design of control unit
etc.
Chapter 8: Central processing unit
8-1 Introduction
8-2 General register organization
8-3 Stack organization
8-4 Instruction formats
8-5 Addressing models
etc.
Chapter 9: Pipeline and vector processing
9-1 Parallel processing
9-2 Pipelining
9-3 Arithmetic pipeline
9-4 Instruction pipeline
9-5 RISC pipeline
etc.
Chapter 10: Computer arithmetic
10-1 Introduction
10-2 Addition and subtraction
10-3 Multiplication algorithms
10-4 Division algorithms
10-5 Floating- point arithmetic operation
etc.
Chapter 11: Input- out put organization
11-1 Peripheral devices
11-2 Input- output interface
11-3 Asynchronous data transfer
11-4 Modes of transfer
11-5 Priority interrupt
etc.
Chapter 12: Memory organization
12-1 Memory hierarchy
12-2 Main memory
12-3 Auxiliary memory
12-4 Associative memory
12-5 Cache memory
etc.
Chapter 13: Multiprocessor
13-1 Characteristics of micro processors
13-2 Interconnection structure
13-3 Inter processor arbitration
13-4 Inter processor communication
13-5 Cache coherence
etc.
Includes bibliographical references: index:p.515-525.
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