Assembly language programming for intel processors family / Vasile , Lungu.

CONTENTS

PART I

1. A brief history

Computers
Processors
Processor programming

1. Computer architecture

1.1 Memory architecture
1.2 Linear Memory
1.3 Virtual memory
1.4 Memory segmentation
1.5 Virtual memory and dynamic memory allocation

2. Virtual addressing and protection mechanism

2.1 Segment descriptors
2.2 Segmentation
2.3 Privilege levels
2.4 Interlevel communication and gates
2.5 Task state segment and descriptor tables
etc

3. Paging and catch Memory management

3.1 Paging Implementation
3.2 Multitasking and combining paging and segmentation
3.3 The internal catch

4. Superscalar processors

4.1 Instruction decoding and data dependencies analysis
4.2 Allocation of instruction parallel execution units
4.3 Trends

5. Intel processor family architecture

5.1. Intel 286 processor architecture
5.2. Base architecture
5.3. 80386 processor architecture
5.4. 80486 Processor architecture
5.5 PENTIUM processors

6. The interrupt system

6.1. External interrupts
6.2. Internal interrupts
6.3. The interrupt vector table
6.4. Protected mode interrupts
6.5. Interrupt service procedures

7. Instruction format

7.1. Construction encoding
7.2. Addressing modes

8. Assembly language

8.1 Constant definition
8.2 Assembly language statements
8.3 Assembly language instructions
8.4 Data definition in assembly languages
8.5 Operators
etc

9. Segment definition and use

9.1 Segment definition
9.2 Simplified segment definition
9.3 Segment assignment to segment registers
9.4 Segment register initialization
9.5 Segment prefix
etc

10. The instruction set

10.1 Data transfer instructions
10.2 Arithmetic instructions
10.3 Bit Manipulation instructions
10.4 String instructions
10.5 Program control transfer instructions
etc

11. Assembly language procedures

11.1 Procedure definition and use
11.2 Recursive procedures

12. Programs composed of several Modules

12.1 PUBLIC, EXTRN, GLOBAL COMM, and INCLUDE Directives
12.2 Parameter passing for High-level language
12.3 High-level language conventions for parameter passing
etc

13. Macroinstruction definition and use

13.1 The repeat microinstruction
13.2 Conditional repeat microinstructions
13.3 &, % and ! Operators

14. Conditional assembly directives

14.1 Directives for conditional generation of errors

15. Data structures in assembly language

15.1. Structure definition and STRUC Directive
15.2. Record definition and the RECORD Directive

16. BIOS and DOS Interrupts

16.1 BIOS Functions
16.2 DOS Functions
16.3 Disc information structure and Disc Operations
16.4 Format of executable programs
etc

17. Memory resident programs (TSR)

17.1 Components of a TSR program
17.2 TSR Programs activated from the keyboard
17.3 The resident Component of a TSR program
17.4 Uninstalling (removing) a TSR program

18. Mixing 16-Bit and 32-Bit Code

19.MMX Technology

19.1. Instructions and data structures of MMX Technology
19.2 Data Conversions
19.3 MMX Instruction execution

20. The floating-point Unit

20.1 Floating-point unit Architecture
20.2 Floating point Unit Instruction set

Includes bibliographical references : p.565-566, Index: p.567-577